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NVIC MCAL Module

Supported STM32 families: F4 · G4 · H5 · U5
Not supported: H7, L4

This repository provides the NVIC (Nested Vectored Interrupt Controller) MCAL module for STM32 microcontrollers.
The module is designed to be branch-specific, where each branch represents one STM32 family (e.g. L4, F4, U5).
Switching between branches allows developers to use the same interface across families.

Module Overview​

The NVIC MCAL module provides an abstraction layer for configuring and handling interrupts on STM32 MCUs.
It exposes a unified API for all supported families to:

  • Initialize / deinitialize NVIC configuration
  • Register and manage interrupt handlers
  • Configure priorities
  • Control pending and active states
  • Support both peripheral interrupts and core system interrupts
  • Provide default handler management

Public API​

Module Information​

nvic_ModuleVersion_t Nvic_Get_ModuleVersion(void);

Initialization​

void Nvic_Init(void);
void Nvic_Deinit(void);
void Nvic_Task(void);

Stack Pointer Access​

uint32_t Nvic_Get_StackPointerAddr(void);

Default Handler​

nvic_RequestState_t Nvic_Set_DefaultHandler(nvic_IsrCallback_t defaultHandler);

Peripheral IRQ Handling​

nvic_RequestState_t Nvic_Set_PeriphIrq_Handler (nvic_PeriphIrqList_t irqId, const nvic_IsrCallback_t irqHandler);
nvic_RequestState_t Nvic_Get_PeriphIrq_Handler (nvic_PeriphIrqList_t irqId, nvic_IsrCallback_t *irqHandler);

nvic_RequestState_t Nvic_Set_PeriphIrq_Prio    (nvic_PeriphIrqList_t irqId, nvic_IrqPrio_t irqPrio);
nvic_RequestState_t Nvic_Get_PeriphIrq_Prio    (nvic_PeriphIrqList_t irqId, nvic_IrqPrio_t *irqPrio);

nvic_RequestState_t Nvic_Set_PeriphIrq_Active  (nvic_PeriphIrqList_t irqId);
nvic_RequestState_t Nvic_Set_PeriphIrq_Inactive(nvic_PeriphIrqList_t irqId);

nvic_RequestState_t Nvic_Set_PeriphIrq_Pending (nvic_PeriphIrqList_t irqId, nvic_IrqFlag_t irqFlag);
nvic_RequestState_t Nvic_Get_PeriphIrq_Pending (nvic_PeriphIrqList_t irqId, nvic_IrqFlag_t *irqFlag);

Core IRQ Handling​

nvic_RequestState_t Nvic_Set_CoreIrq_Handler(nvic_CoreIrqList_t irqId, const nvic_IsrCallback_t irqHandler);
nvic_RequestState_t Nvic_Get_CoreIrq_Handler(nvic_CoreIrqList_t irqId, nvic_IsrCallback_t *irqHandler);

nvic_RequestState_t Nvic_Set_CoreIrq_Prio   (nvic_CoreIrqList_t irqId, nvic_IrqPrio_t irqPrio);
nvic_RequestState_t Nvic_Get_CoreIrq_Prio   (nvic_CoreIrqList_t irqId, nvic_IrqPrio_t *irqPrio);

Branch Strategy​

  • Each branch corresponds to a specific STM32 family (e.g. STM32L4, STM32F4, STM32U5).
  • The public API remains consistent across branches.
  • Only the low-level implementation differs, ensuring portability of higher layers.

Usage Example​

// Example: Setting up IRQ handler for a peripheral
Nvic_Set_PeriphIrq_Handler(UART1_IRQn, MyUartHandler);
Nvic_Set_PeriphIrq_Prio(UART1_IRQn, NVIC_PRIORITY_HIGH);
Nvic_Set_PeriphIrq_Active(UART1_IRQn);

🛠 CMake Integration​

  1. Include Nvic_Lib in your CMake library.
  2. Include Nvic_Port.h in your project.
  3. Link against the Nvic module implementation files.
  4. Configure the module as needed for your hardware.

License​

This project is licensed under the Creative Commons Attribution–NonCommercial 4.0 International (CC BY-NC 4.0).

You are free to use, modify, and share this work for non-commercial purposes, provided appropriate credit is given.

See LICENSE.md for full terms or visit creativecommons.org/licenses/by-nc/4.0.

Authors​

Contributions are welcome! Please open a pull request.